A low-power single-ended SRAM in FinFET technology

被引：52

作者：

Ensan, Sina Sayyah ^{[1
]}

Moaiyeri, Mohammad Hossein ^{[2
]}

Moghaddam, Majid ^{[2
]}

Hessabi, Shaahin ^{[1
]}

机构：

[1] Sharif Univ Technol, Dept Comp Engn, Tehran 111559517, Iran

[2] Shahid Beheshti Univ, GC, Dept Elect Engn, Tehran 1983963113, Iran

来源：

AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS | 2019年 / 99卷

关键词：

SRAM; Single-ended structure; Low-power design; Near-threshold operation; ULTRA-LOW-POWER; SUBTHRESHOLD SRAM; SENSE-AMPLIFIER; BIT-LINE; READ; CELL; DESIGN;

D O I：

10.1016/j.aeue.2018.12.015

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a single-ended low-power 7T SRAM cell in FinFET technology. This cell enhances read performance by isolating the storage node from the read path. Moreover, disconnecting the feedback path of the cross-coupled inverters during the write operation enhances WSNM by nearly 7.7X in comparison with the conventional 8T SRAM cell. By using only one bit-line, this cell reduces power consumption and PDP compared to the conventional 8T SRAM cell by 82% and 35%, respectively. (C) 2018 Elsevier GmbH. All rights reserved.

引用

页码：361 / 368

页数：8

共 50 条

[1] Single-Ended Half-Swing Low-Power SRAM Design
Choday, Harsha
Stine, James E.
[J]. 2008 42ND ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS, VOLS 1-4, 2008, : 2108 - 2112
[2] A low-power low-swing single-ended multi-port SRAM
Yang, Hao-, I
Chang, Ming-Hung
Lai, Ssu-Yun
Wang, Hsiang-Fei
Hwang, Wei
[J]. 2007 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS, 2007, : 28 - +
[3] A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM
Shi, Dashan
You, Heng
Yuan, Jia
Wang, Yulian
Qiao, Shushan
[J]. IEICE TRANSACTIONS ON ELECTRONICS, 2022, E105C (11) : 712 - 719
[4] Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell
Ahmad, Sayeed
Gupta, Mohit Kumar
Alam, Naushad
Hasan, Mohd
[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (08) : 2634 - 2642
[5] Low-Power 9T Subthreshold SRAM Cell with Single-Ended Write Scheme
Sinha, Anubhav
Kumar, Vikash
Islam, Aminul
[J]. 2015 ANNUAL IEEE INDIA CONFERENCE (INDICON), 2015,
[6] Low-power half-select free single-ended 10 transistor SRAM cell
Anubhav Sinha
Aminul Islam
[J]. Microsystem Technologies, 2017, 23 : 4133 - 4144
[7] Low-power half-select free single-ended 10 transistor SRAM cell
Sinha, Anubhav
Islam, Aminul
[J]. MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2017, 23 (09): : 4133 - 4144
[8] Single-Ended Near Threshold 9T SRAM for Portable Low-Power Biomedical Applications
Kumar, Appikatla Phani
Lorenzo, Rohit
[J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2024,
[9] A Single-Ended Low Power 16-nm FinFET 6T SRAM Design With PDP Reduction Circuit
Wang, Chua-Chin
Sangalang, Ralph Gerard B.
Tseng, I-Ting
[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68 (12) : 3478 - 3482
[10] Ultra Low Power Single-ended 6T SRAM Using 40 nm CMOS Technology
Wang, Chua-Chin
Tseng, I-Ting
[J]. 17TH IEEE INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT 2019), 2019,

← 1 2 3 4 5 →