Environment for fault simulation acceleration on FPGA

被引：0

作者：

Ellervee, P ^{[1
]}

Raik, J ^{[1
]}

Tihhomirov, V ^{[1
]}

机构：

[1] Tallim Univ Technol, Dept Comp Engn, Tallinn, Estonia

来源：

BEC 2004: PROCEEDING OF THE 9TH BIENNIAL BALTIC ELECTRONICS CONFERENCE | 2004年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present an environment to accelerate fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is frequently used throughout the test generation process. We studied the feasibility of using reconfigurable hardware emulator instead of software simulation. Experiments showed that it is beneficial to use emulation for circuits/methods that require large numbers of test vectors, e.g., sequential circuits and/or genetic algorithms.

引用

页码：217 / 220

页数：4

共 50 条

[41] Ground Simulation Tests in Two-Dimensional Dynamic Acceleration Environment
Zhang, Yanbing
Ma, Tiehua
Zhang, Hongyan
Wu, Yaoyan
Wu, Zhibo
Yu, Junzhi
APPLIED SCIENCES-BASEL, 2020, 10 (03):
[42] Urban environment art design simulation based on FPGA and neural network
Xing, Chunyan
Song, Lingyun
MICROPROCESSORS AND MICROSYSTEMS, 2021, 80
[43] Fault and acceleration test
Okamoto H.
Journal of Japan Institute of Electronics Packaging, 2018, 21 (04) : 277 - 280
[44] A development and simulation environment for a floating point operations FPGA based accelerator
Bera, M
Danese, G
De Lotto, I
Leporati, F
Spelgatti, A
EUROMICRO SYMPOSIUM ON DIGITAL SYSTEM DESIGN, PROCEEDINGS, 2003, : 173 - 179
[45] PyXEL: An Integrated Environment for the analysis of Fault Effects in SRAM-based FPGA Routing
Bozzoli, Ludovica
De Sio, Corrado
Sterpone, Luca
Bernardeschi, Cinzia
PROCEEDINGS OF THE 2018 29TH INTERNATIONAL SYMPOSIUM ON RAPID SYSTEM PROTOTYPING (RSP): SHORTENING THE PATH FROM SPECIFICATION TO PROTOTYPE, 2018, : 70 - 75
[46] ICT gateway to simulation environment for electrical fault injection and recovery
Gupta, Pragya Kirti
Savolainen, Pekka
Duchon, Markus
2019 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CONTROL, AND COMPUTING TECHNOLOGIES FOR SMART GRIDS (SMARTGRIDCOMM), 2019,
[47] Simulation Environment for the Testing of Electrical Arc Fault Detection Algorithms
Lezama, Jinmi
Schweitzer, Patrick
Tisserand, Etienne
Weber, Serge
ELECTRONICS, 2024, 13 (20)
[48] Adaptation of an event-driven simulation environment to sequentially propagated concurrent fault simulation
Zolfy, M
Mirkhani, S
Navabi, Z
DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS, 2001, : 823 - 823
[49] Fpga acceleration for DNA sequence alignment
Caffarena, Gabriel
Pedreira, Carlos
Carreras, Carlos
Bojanic, Slobodan
Nieto-Taladriz, Octavio
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2007, 16 (02) : 245 - 266
[50] Acceleration of Rotated Object Detection on FPGA
Fan, Xitian
Xie, Guangwei
Huang, Zhongchen
Cao, Wei
Wang, Lingli
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69 (04) : 2296 - 2300

← 1 2 3 4 5 →