Bonding Based Channel Transfer and Low Temperature Process for Monolithic 3D Integration Platform Development

被引：0

作者：

Choi, Rino ^{[1
]}

Yu, Hyun-Yong ^{[2
]}

Kim, Hyungsub ^{[3
]}

Ryu, Han-Youl ^{[4
]}

Bae, Hee-Kyung ^{[5
]}

Choi, Kevin Kinam ^{[6
]}

Cha, Yong-Won ^{[6
]}

Choi, Changhwan ^{[7
]}

机构：

[1] Inha Univ, Dept Mat Sci & Engn, Incheon 402751, South Korea

[2] Korea Univ, Sch Elect Engn, Seoul 136701, South Korea

[3] Sungkyunkwan Univ, Sch Adv Mat Sci & Engn, Suwon 16419, South Korea

[4] Inha Univ, Dept Phys, Incheon 402751, South Korea

[5] Natl NanoFab Ctr NNFC, Daejon 34141, South Korea

[6] The Bondis, Hwaseong 18449, South Korea

[7] Hanyang Univ, Div Mat Sci & Engn, Seoul 04763, South Korea

来源：

2016 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2016年

基金：

新加坡国家研究基金会;

关键词：

Monolithic; 3D; Low Temperature Bonding; Epitaxial Growth; Gate Stack; Laser Annealing;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have studied low temperature processes for monolithic 3D integration platform development including hydrogen/helium ion implantation-based wafer cleavage & bonding (<450 degrees C), low temperature (<550 degrees C) in-situ doped S/D selective SiGe epi process, low temperature (<200 degrees C) gate stack on the chemical-mechanical polished (CMP) wafer, and green-lased annealing. These unit technologies can be adopted to achieve 3D integration platform technology for the high performance and low power applications.

引用

页数：2

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