共 50 条
- [21] A new fast and efficient 2-D median filter architecture SADHANA-ACADEMY PROCEEDINGS IN ENGINEERING SCIENCES, 2020, 45 (01):
- [23] Hardware efficient 2-D DWT architecture without off-chip RAM Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University, 2017, 44 (04): : 138 - 143
- [25] A Hardware-Efficient H.264/AVC Motion Estimation Using Adaptive Computation Aware Algorithm 2014 INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION AND EMBEDDED SYSTEMS (ICICES), 2014,
- [26] Hardware-efficient PRBGS based on 1-D piecewise linear chaotic maps ICECS 2004: 11TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, 2004, : 242 - 245
- [27] Efficient hardware architecture for direct 2D DCT computation and its FPGA Implementation 2013 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS (ICM), 2013,
- [28] A HARDWARE-EFFICIENT ARCHITECTURE FOR MULTI-RESOLUTION MOTION ESTIMATION USING FULLY RECONFIGURABLE PROCESSING ELEMENT ARRAY 2011 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO (ICME), 2011,