Channel Conductance Modulation of Dual-Gate Charge-Trap Oxide Synapse TFT Using In-Ga-Zn-O Channel and ZnO Trap Layers

被引：9

作者：

Ryoo, Hyun-Joo ^{[1
]}

Yoon, Sung-Min ^{[1
]}

机构：

[1] Kyung Hee Univ, Dept Adv Mat Engn Informat & Elect, Yongin 17104, South Korea

来源：

IEEE ELECTRON DEVICE LETTERS | 2020年 / 41卷 / 11期

关键词：

Logic gates; Tunneling; Synapses; Indexes; Electrodes; Aluminum oxide; Thin film transistors; Charge-trap-type; oxide semiconductor; synaptic operation; dual-gate configuration; thin film transistor; IMPLEMENTATION;

D O I：

10.1109/LED.2020.3023138

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Synaptic operations of all-oxide based charge-trap oxide synapse TFTs using dual-gate configuration (DG CTOx-STFTs) were demonstrated. Short-term plasticity of biological synapses were successfully mimicked by paired-pulse facilitation. Furthermore, by adopting an incremental step potentiation pulse scheme, the amount of detrapped charge could be calculated from the gradually modulated channel conductance. The multi-valued assigned states exhibit stable long-term plasticity characteristics. The introduction of DG configuration was found to be a good solution to effectively control the CTOx-STFTs.

引用

页码：1661 / 1664

页数：4

共 26 条

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