Efficient test generation for transient testing of analog circuits using partial numerical simulation

Dynamic transient tests can give better parametric and catastrophic fault coverage than both static DC and frequency domain AC tests in minimum rest time. However; determination of optimum transient tests is a complex search problem. Previous researchers have used accurate but computationally expensive fault simulation to guide the search for the optimum transient tests. In this paper we propose to use partial numerical simulation to guide the search for the optimum input test stimulus. The proposed method dynamically adjusts the number of Newton Raphson iterations and transient simulation time steps to perform fast test generation without sacrificing the test quality (fault coverage). This heuristic relies on the observation that although partial numerical circuit simulation may be inaccurate for determining the exact faulty circuit response to an applied test stimulus, it can determine very well how one test stimulus performs relative to another in detecting a fault. Simulation studies show that rest generation using partial numerical simulation can generate high quality tests much faster compared to test generation methods based on accurate simulation without compromising test quality.