共 50 条
- [41] Analytical Compact Model of Nanowire Junctionless Gate-All-Around MOSFET Implemented in Verilog-A for Circuit Simulation [J]. Silicon, 2022, 14 : 10967 - 10976
- [42] Accuracy balancing for the simulation of gate-all-around junctionless nanowire transistors using discrete Wigner transport equation [J]. AIP ADVANCES, 2018, 8 (11):
- [49] Physics-based drain current modeling of gate-all-around junctionless nanowire twin-gate transistor (JN-TGT) for digital applications [J]. Journal of Computational Electronics, 2016, 15 : 492 - 501
- [50] Impact of Nanowire Variability on Performance and Reliability of Gate-all-around III-V MOSFETs [J]. 2013 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2013,