共 50 条
- [1] Experimental analysis of velocity overshoot degradation in sub-0.1 mu m fully-depleted SOI-MOSFETs JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1997, 36 (3B): : 1543 - 1547
- [2] Short channel effects in sub-0.1 mu m SOI-MOSFETs PROCEEDINGS OF THE EIGHTH INTERNATIONAL SYMPOSIUM ON SILICON-ON-INSULATOR TECHNOLOGY AND DEVICES, 1997, 97 (23): : 227 - 232
- [3] Vertical, fully-depleted, surrounding gate MOSFETs on sub-0.1 mu m thick silicon pillars 1996 54TH ANNUAL DEVICE RESEARCH CONFERENCE DIGEST, 1996, : 108 - 109
- [5] SOI devices for sub-0.1 μm gate lengths 2002 23RD INTERNATIONAL CONFERENCE ON MICROELECTRONICS, VOLS 1 AND 2, PROCEEDINGS, 2002, : 109 - 113
- [7] Design criteria for a fully depleted 0.1μm SOI technology 1997 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 1996, : 78 - 79
- [9] Simulated device design optimization to reduce the floating body effect for sub-quarter micron fully depleted SOI-MOSFETs IEICE Trans Electron, 7 (893-898):