共 50 条
- [21] Potential Benefits of Graded Channel Dopingless Transistor with Source side Dual-k Spacer to Upgrade Analog/RF Performance [J]. PROCEEDINGS OF 2017 INTERNATIONAL CONFERENCE ON INTELLIGENT COMPUTING AND CONTROL (I2C2), 2017,
- [25] Statistical Variability and Sensitivity Analysis of Dual-k Spacer FinFET Device-Circuit Co-Design [J]. PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2015, : 190 - 193
- [28] Electrical Characteristics of 14nm SiC-3C Channel SOI FinFET with Dual-k Spacer [J]. 2016 IEEE 7TH POWER INDIA INTERNATIONAL CONFERENCE (PIICON), 2016,