Growth of InAs/InAlAs Core-Shell Nanowires on Si and Transistor Application

We review the fabrication process for a surrounding-gate transistor using InAs and InAs/InAlAs core-multishell nanowires (NWs) heterogeneously integrated on Si. Selective-area metal-organic vapor-phase epitaxy (SA-MOVPE) that allows for the position-controlled growth of vertical InAs NWs on (111) oriented surfaces using lithographic techniques was used to grow these nanowires. The nanometer-scale growth enabled for the integration of III-V NWs on Si regardless of apparent lattice mismatches. A non-planar vertical transistor architecture, which is a vertical surrounding-gate structure, was demonstrated on Si substrate. This demonstrated device should have broad applications for use in high-electron mobility transistors with a functionality not made possible using conventional Si-CMOS techniques.