Self-coupled MASH Delta-Sigma Modulator with Zero Optimization

被引:1
|
作者
Zhang, Jingying [1 ]
Zhao, Yang [1 ]
Chen, Mingyi [1 ]
Chen, Chixiao [2 ]
Ye, Fan [2 ]
Qi, Liang [1 ]
机构
[1] Shanghai Jiao Tong Univ, Dept Micronano Elect, Shanghai, Peoples R China
[2] Fudan Univ, State Key Lab ASIC & Syst, Shanghai, Peoples R China
基金
美国国家科学基金会;
关键词
delta-sigma modulator (DSM); multi-stage noise-shaping (MASH); zero optimization; self-coupled;
D O I
10.1109/ISOCC53507.2021.9613903
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a discrete time (DT) self-coupled multi-stage noise-shaping (MASH) delta-sigma modulator (DSM) with zero optimization. Zero optimization scheme is incorporated into the self-coupled path between the MASH stages, thus generating a desired notch in the band edge for the leaked quantization noise. When compared with a general self-coupled path, the employment of zero optimization can further mitigate the quantization noise leakage. Moreover, this zero-optimization scheme can be easily implemented by changing the coefficient of the self-coupled path. Therefore, it does not impose any additional hardware consumption. A 2+2 MASH DSM was built in the Matlab Simulink to demonstrate its principle. Simulation results show that the proposed architecture relaxed the DC gain requirements for the integrators further.
引用
收藏
页码:1 / 2
页数:2
相关论文
共 50 条
  • [21] Delta-Sigma Modulator based multiplier
    Diwakar, K.
    Senthilpari, C.
    Soong, Lim Way
    Singh, Ajay Kumar
    IEICE ELECTRONICS EXPRESS, 2009, 6 (06): : 322 - 328
  • [22] An 18-bit 2-2 MASH delta-sigma modulator for isolated amplifier
    Yu, Wenxin
    He, Lenian
    Xi, Jianxiong
    MICROELECTRONICS JOURNAL, 2023, 136
  • [23] A Spur-Free MASH Digital Delta-Sigma Modulator with Higher Order Shaped Dither
    Fitzgibbon, Brian
    O'Neill, Kieran
    Grannell, Andrew
    Horgan, Ciaran
    Ye, Zhipeng
    Hosseini, Kaveh
    Kennedy, Michael Peter
    2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2, 2009, : 723 - +
  • [24] Dual-clock MASH delta-sigma modulator employing a frequency modulated intermediate signal
    Maezawa, Koichi
    Sakou, Mario
    Matsubara, Wataru
    Mizutani, Takashi
    IEICE ELECTRONICS EXPRESS, 2006, 3 (21): : 459 - 463
  • [25] Spur-Free MASH Delta-Sigma Modulation
    Song, Jinook
    Park, In-Cheol
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (09) : 2426 - 2437
  • [26] Optimization of Delta-Sigma Modulator Based on Reinforcement Learning for Mobile Fronthaul
    Yan, Zijun
    Zhu, Yixiao
    Yang, Guangying
    Hu, Weisheng
    IEEE PHOTONICS TECHNOLOGY LETTERS, 2025, 37 (07) : 397 - 400
  • [27] Analysis and simulation of a cascaded delta delta-sigma modulator
    Joseph, D
    Tarassenko, L
    Collins, S
    COMPUTER STANDARDS & INTERFACES, 2001, 23 (02) : 103 - 110
  • [28] Comparative Study of the MASH Digital Delta-Sigma Modulators
    Xu, Tao
    Condon, Marissa
    PRIME: PROCEEDINGS OF THE CONFERENCE 2009 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, 2009, : 196 - 199
  • [29] LSB dithering in MASH delta-sigma D/A converters
    Pamarti, Sudhakar
    Galton, Ian
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (04) : 779 - 790
  • [30] Analysis and simulation of a cascaded delta delta-sigma modulator
    Joseph, D
    Tarassenko, L
    Collins, S
    THIRD INTERNATIONAL CONFERENCE ON ADVANCED A/D AND D/A CONVERSION TECHNIQUES AND THEIR APPLICATIONS, 1999, (466): : 54 - 57