Self-coupled MASH Delta-Sigma Modulator with Zero Optimization

被引:1
|
作者
Zhang, Jingying [1 ]
Zhao, Yang [1 ]
Chen, Mingyi [1 ]
Chen, Chixiao [2 ]
Ye, Fan [2 ]
Qi, Liang [1 ]
机构
[1] Shanghai Jiao Tong Univ, Dept Micronano Elect, Shanghai, Peoples R China
[2] Fudan Univ, State Key Lab ASIC & Syst, Shanghai, Peoples R China
基金
美国国家科学基金会;
关键词
delta-sigma modulator (DSM); multi-stage noise-shaping (MASH); zero optimization; self-coupled;
D O I
10.1109/ISOCC53507.2021.9613903
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a discrete time (DT) self-coupled multi-stage noise-shaping (MASH) delta-sigma modulator (DSM) with zero optimization. Zero optimization scheme is incorporated into the self-coupled path between the MASH stages, thus generating a desired notch in the band edge for the leaked quantization noise. When compared with a general self-coupled path, the employment of zero optimization can further mitigate the quantization noise leakage. Moreover, this zero-optimization scheme can be easily implemented by changing the coefficient of the self-coupled path. Therefore, it does not impose any additional hardware consumption. A 2+2 MASH DSM was built in the Matlab Simulink to demonstrate its principle. Simulation results show that the proposed architecture relaxed the DC gain requirements for the integrators further.
引用
收藏
页码:1 / 2
页数:2
相关论文
共 50 条
  • [31] A Tunable SC Bandpass Delta-Sigma Modulator with Noise-Coupled Architecture
    Huang, Shu-Chuan
    Wang, Ting-Yen
    2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2011,
  • [32] Resolution-enhanced sturdy MASH delta-sigma modulator for wideband low-voltage applications
    Qi, Liang
    Sin, Sai-Weng
    U, Seng-Pan
    Martins, Rui Paulo
    ELECTRONICS LETTERS, 2015, 51 (14) : 1061 - 1062
  • [33] A 12-bit 3.125 MHz Bandwidth 0-3 MASH Delta-Sigma Modulator
    Gharbiya, Ahmed
    Johns, David A.
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (07) : 2010 - 2018
  • [34] A 5.2GHz CMOS Fractional-N Frequency Synthesizer With a MASH Delta-Sigma Modulator
    Chen, Chin-Ying
    Ho, Jyh-Jier
    Liou, Wan-Rone
    Hsiao, Robert Y.
    2008 51ST MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2008, : 738 - +
  • [35] A 10-MHz multi-bit MASH delta-sigma modulator with analog summing interstage
    Wang, Zhidong
    Jung, Youngjae
    Roh, Jeongjin
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2015, 85 (01) : 201 - 207
  • [36] Fully digital feedforward delta-sigma modulator
    Gharbiya, A
    Johns, DA
    2005 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, VOLS 1 AND 2, PROCEEDINGS, 2005, : 71 - 74
  • [37] A High Performance Delta-Sigma Modulator for Neurosensing
    Xu, Jian
    Zhao, Menglian
    Wu, Xiaobo
    Islam, Md. Kafiul
    Yang, Zhi
    SENSORS, 2015, 15 (08) : 19466 - 19486
  • [38] Subtractive Dithering Technique for Delta-Sigma Modulator
    Tan, Zhichao
    Maurino, Roberto
    Adams, Robert
    Nguyen, Khiem
    2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 555 - 558
  • [39] Zero-cross Switching Control of Halogen Lamp Heater with Delta-sigma Modulator
    Suzuki, Daisuke
    Yoneya, Akihiko
    PROCEEDINGS OF THE IECON 2016 - 42ND ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2016, : 377 - 381
  • [40] Maximum sequence length MASH digital delta-sigma modulators
    Hosseini, Kaveh
    Kennedy, Michael Peter
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (12) : 2628 - 2638