共 50 条
- [1] A framework for System Level Low Power Design Space Exploration 2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2017, : 437 - 441
- [2] High-level power estimation and low-power design space exploration for FPGAs PROCEEDINGS OF THE ASP-DAC 2007, 2007, : 529 - +
- [3] Fast system-level design space exploration for low power configurable multimedia systems-on-chip 15TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2002, : 150 - 154
- [6] DESSERT: DESign Space ExploRation Tool based on Power and Energy at System-Level 2014 27TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2014, : 48 - 53
- [7] High-Level Low-Power System Design Optimization 2017 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2017,
- [8] Graphical framework for system level design space exploration INFORMACIJE MIDEM-JOURNAL OF MICROELECTRONICS ELECTRONIC COMPONENTS AND MATERIALS, 2007, 37 (03): : 132 - 141
- [9] CODEF: A system level design space exploration tool 2001 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I-VI, PROCEEDINGS: VOL I: SPEECH PROCESSING 1; VOL II: SPEECH PROCESSING 2 IND TECHNOL TRACK DESIGN & IMPLEMENTATION OF SIGNAL PROCESSING SYSTEMS NEURALNETWORKS FOR SIGNAL PROCESSING; VOL III: IMAGE & MULTIDIMENSIONAL SIGNAL PROCESSING MULTIMEDIA SIGNAL PROCESSING - VOL IV: SIGNAL PROCESSING FOR COMMUNICATIONS; VOL V: SIGNAL PROCESSING EDUCATION SENSOR ARRAY & MULTICHANNEL SIGNAL PROCESSING AUDIO & ELECTROACOUSTICS; VOL VI: SIGNAL PROCESSING THEORY & METHODS STUDENT FORUM, 2001, : 1145 - 1148
- [10] Formal system-level design space exploration CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2013, 25 (02): : 250 - 264