共 50 条
- [41] A Novel Topology for Multilevel Inverter with Reduced Number of Switches WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2013, VOL I, 2013, I : 350 - 354
- [43] New Multilevel Inverter Topology with Reduced Component Count 2019 21ST EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS (EPE '19 ECCE EUROPE), 2019,
- [44] Asymmetrical Multilevel Inverter Topology with Reduced Number of Switches INTERNATIONAL REVIEW OF ELECTRICAL ENGINEERING-IREE, 2012, 7 (04): : 4761 - 4767
- [45] Performance Analysis of a Multilevel Inverter Topology with Reduced Switches 2015 INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATION AND CONTROL (IC4), 2015,
- [46] Hybrid Multilevel Inverter Topology With Reduced Part Count 2018 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES), 2018,
- [47] The New Topology of Multilevel Inverter with Reduced Number of Switches 2020 11TH IEEE CONTROL AND SYSTEM GRADUATE RESEARCH COLLOQUIUM (ICSGRC), 2020, : 94 - 99
- [48] Analysis of a Multilevel Inverter Topology with Reduced Number of Switches TRANSACTIONS ON ENGINEERING TECHNOLOGIES: SPECIAL ISSUE OF THE WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE 2013, 2014, : 41 - 54
- [49] An asymmetrical multilevel inverter topology with reduced source count 2016 IEEE STUDENTS' CONFERENCE ON ELECTRICAL, ELECTRONICS AND COMPUTER SCIENCE (SCEECS), 2016,