FPGA Implementation of a Custom Floating-Point Library

被引：0

作者：

Campos, Nelson ^{[1
]}

Edirisinghe, Eran ^{[2
,3
]}

Fatima, Shaheen ^{[1
]}

Chesnokov, Slava

Lluis, Alexis ^{[4
]}

机构：

[1] Univ Loughborough, Loughborough, England

[2] Keele Univ, Keele, England

[3] Imaging CV Ltd, London, England

[4] ARM Ltd, Manchester, England

来源：

INTELLIGENT SYSTEMS AND APPLICATIONS, VOL 2 | 2023年 / 543卷

关键词：

Floating-point arithmetic; FPGA; Real-time; VLSI;

D O I：

10.1007/978-3-031-16078-3_36

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper presents FPGA implementation of a floating-point library for high-performance video processing. The library comprises functions including addition, multiplication, division, square-root, exponentiation and logarithm, as well as floating-point to fixed-point and fixed-point to floating-point conversion. We implement a set of composite functions using this library to compute custom floating-point arithmetic using an Artix-7 FPGA. The synthesis of the library using the software toolkit Vivado from Xilinx is performed and compared with the open-source floating-point library Flopoco. The synthesized library has a maximum latency of 18 cycles to process 20 composite floating-point functions in parallel running at a clock frequency of 148.5 MHz.

引用

页码：527 / 542

页数：16

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