MOSFET-like CNFET based logic gate library for low-power application:a comparative study

被引:0
|
作者
P.A.Gowri Sankar [1 ]
K.Udhayakumar [1 ]
机构
[1] Department of Electrical Engineering,Anna University
关键词
CNFET; digital integrated circuits; logic gate design; low-voltage low-power logic styles;
D O I
暂无
中图分类号
TN386 [场效应器件];
学科分类号
0805 ; 080501 ; 080502 ; 080903 ;
摘要
The next generation of logic gate devices are expected to depend upon radically new technologies mainly due to the increasing difficulties and limitations of existing CMOS technology. MOSFET like CNFETs should ideally be the best devices to work with for high-performance VLSI. This paper presents results of a comprehensive comparative study of MOSFET-like carbon nanotube field effect transistors(CNFETs) technology based logic gate library for high-speed, low-power operation than conventional bulk CMOS libraries. It focuses on comparing four promising logic families namely: complementary-CMOS(C-CMOS), transmission gate(TG), complementary pass logic(CPL) and Domino logic(DL) styles are presented. Based on these logic styles, the proposed library of static and dynamic NAND-NOR logic gates, XOR, multiplexer and full adder functions are implemented efficiently and carefully analyzed with a test bench to measure propagation delay and power dissipation as a function of supply voltage. This analysis provides the right choice of logic style for low-power, high-speed applications. Proposed logic gates libraries are simulated using Synopsys HSPICE based on the standard 32 nm CNFET model. The simulation results demonstrate that, it is best to use C-CMOS logic style gates that are implemented in CNFET technology which are superior in performance compared to other logic styles, because of their low average powerdelayproduct(PDP). The analysis also demonstrates how the optimum supply voltage varies with logic styles in ultra-low power systems. The robustness of the proposed logic gate library is also compared with conventional and state-art of CMOS logic gate libraries.
引用
收藏
页码:116 / 128
页数:13
相关论文
共 50 条
  • [21] Double gate MOSFET subthreshold logic for ultra-low power applications
    Kim, JJ
    Roy, K
    2003 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2003, : 97 - 98
  • [22] LOW-POWER, HIGH-SPEED INTEGRATED-LOGIC WITH GAAS MOSFET
    YOKOYAMA, N
    MIMURA, T
    KUSAKAWA, H
    SUYAMA, K
    FUKUTA, M
    JAPANESE JOURNAL OF APPLIED PHYSICS, 1980, 19 : 325 - 328
  • [23] Programmable floating-gate MOS logic for low-power operation
    Berg, Y
    Lande, TS
    ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 1792 - 1795
  • [24] A NOVEL LOW-POWER STATIC GAAS-MESFET LOGIC GATE
    NAMORDI, MR
    WHITE, WA
    ELECTRON DEVICE LETTERS, 1982, 3 (09): : 264 - 267
  • [25] Charge recycling differential logic for low-power application
    Kong, BS
    Choi, JS
    Lee, SJ
    Lee, K
    1996 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 1996, 39 : 302 - 303
  • [26] Low-Power Null Convention Logic Design Based On Modified Gate Diffusion Input Technique
    Metku, Prashanthi
    Seva, Ramu
    Kim, Kyung Ki
    Kim, Yong-Bin
    Choi, Minsu
    PROCEEDINGS INTERNATIONAL SOC DESIGN CONFERENCE 2017 (ISOCC 2017), 2017, : 21 - 22
  • [27] Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique
    Metku, Prashanthi
    Kim, Kyung Ki
    Kim, Yong-Bin
    Choi, Minsu
    2018 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2018, : 233 - 234
  • [28] Negative capacitance double-gate MOSFET for advanced low-power electronic applications
    Kumar, Amit
    Communication, Saurabh Chaturvedi
    Kumar, Satyendra
    MICROELECTRONICS JOURNAL, 2025, 159
  • [29] Low-power analogue computational blocks based on high-performance floating-gate MOSFET resistor
    Rana, Charu
    Afzal, Neelofar
    Prasad, Dinesh
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2019, 106 (05) : 663 - 678
  • [30] Atom Switch Technology for Low-power Nonvolatile Logic Application
    Tada, M.
    Sakamoto, T.
    Miyamura, M.
    Banno, N.
    Okamoto, K.
    Hada, H.
    INTERNATIONAL SYMPOSIUM ON FUNCTIONAL DIVERSIFICATION OF SEMICONDUCTOR ELECTRONICS 2 (MORE-THAN-MOORE 2), 2014, 61 (06): : 57 - 64