A Survey of High-Level Synthesis-Based Hardware (IP) Watermarking Approaches

被引：1
|
作者：
Sengupta, Anirban [1 ]
Anshul, Aditya [1 ]
机构：
[1] Indian Inst Technol Indore, Dept Comp Sci & Engn, Indore 453552, India
来源：
IEEE DESIGN & TEST | 2024年 / 41卷 / 06期
关键词：
Watermarking; Hardware; IP networks; Security; Codes; Dynamic scheduling; Resource management; PROTECTION; CORES;
D O I：
10.1109/MDAT.2024.3435056
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：70 / 83
页数：14
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