Parameterized hardware libraries for configurable system-on-chip technology

被引：0
|
作者：
Luk, Wayne [1 ]
Kean, Tom [1 ]
Derbyshire, Arran [1 ]
Gause, Jörn [1 ]
McKeever, Steve [1 ]
Mencer, Oskar [1 ]
Yeow, Allen [1 ]
机构：
[1] Department of Computing, Imperial College, 180 Queens Gate, London SW7 2BZ, United Kingdom
来源：
Canadian Journal of Electrical and Computer Engineering | 2001年 / 26卷 / 3-4期
关键词：
Algorithms - Application specific integrated circuits - Computer hardware - Computer simulation - Cryptography - Field programmable gate arrays - High level languages - Microcontrollers - Polynomials;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
Two key components in configurable system-on-chip (CSoC) devices are instruction processors and field-programmable logic. This paper describes a framework, based on the Pebble language, that can be used to produce parameterized hardware libraries. Such libraries facilitate the development of user-defined hardware on the field-programmable logic to enhance the capability of the instruction processors in CSoC designs. Libraries are presented that support parameterization of the amount of pipelining and serialization to provide implementations with different trade-offs in resource usage and performance. These libraries have been developed to meet the requirements in terms of efficiency, validability, and ease of use. A case study involving DES encryption for Triscend E5 devices is presented.
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页码：125 / 129
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