共 50 条
- [46] Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD Stress 2023 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS, 2023,
- [47] Gate oxide evaluation under very fast transmission line pulse (VFTLP) CDM-type stress 2008 7TH INTERNATIONAL CARIBBEAN CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS, 2008, : 313 - +
- [48] Analysis and compact modeling of lateral DMOS power devices under ESD stress conditions ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, 1999, 1999, : 1 - 10
- [50] Analysis of dead time set for insulated gate bipolar transistor under different load conditions Gaodianya Jishu/High Voltage Engineering, 2014, 40 (11): : 3584 - 3589