Grounded-gate nMOS transistor behavior under CDM ESD stress conditions

被引:0
|
作者
IMEC, Leuven, Belgium [1 ]
机构
来源
IEEE Trans Electron Devices | / 11卷 / 1972-1980期
关键词
Number:; ERBCHBGCT; 930; 285; Acronym:; -; Sponsor:;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [31] Second breakdown of 18V grounded gate NMOS induced by the Kirk effect under electrostatic discharge
    Jeon, BC
    Lee, SC
    Han, MK
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2003, 42 (9A): : 5516 - 5520
  • [32] Second breakdown of 18V grounded gate NMOS induced by the Kirk effect under electrostatic discharge
    Jeon, Byung-Chul
    Lee, Seung-Chul
    Han, Min-Koo
    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 2003, 42 (9 A): : 5516 - 5520
  • [33] Behavior of RF MEMS switches under ESD stress
    Sangameswaran, Sandeep
    De Coster, Jeroen
    Cherman, Vladimir
    Czarnecki, Piotr
    Linten, Dimitri
    Scholz, Mirko
    Thijs, Steven
    Groeseneken, Guido
    De Wolf, Ingrid
    ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS 2010, 2010,
  • [34] Design rule limitations due to hot carrier degradation of NMOS transistor under DC stress
    Regis, D
    Dekeukeleire, C
    Vanderbauwhede, W
    Demesmaeker, A
    Pergoot, A
    2000 IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP FINAL REPORT, 2000, : 14 - 19
  • [35] An Approach to Characterize Behavior of Multiport ICs under ESD Stress
    Izadi, Omid Hoseini
    Muhonen, Kathleen
    Peachey, Nathaniel
    Pommerenke, David
    2019 41ST ANNUAL EOS/ESD SYMPOSIUM (EOS/ESD), 2019,
  • [36] Analysis of lateral DMOS power devices under ESD stress conditions
    Mergens, MPJ
    Wilkening, W
    Mettler, S
    Wolf, H
    Stricker, A
    Fichtner, W
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (11) : 2128 - 2137
  • [37] Hysteresis analysis of graphene transistor under repeated test and gate voltage stress
    杨杰
    贾昆鹏
    粟雅娟
    陈阳
    赵超
    Journal of Semiconductors, 2014, 35 (09) : 49 - 53
  • [38] Hysteresis analysis of graphene transistor under repeated test and gate voltage stress
    Yang Jie
    Jia Kunpeng
    Su Yajuan
    Chen Yang
    Zhao Chao
    JOURNAL OF SEMICONDUCTORS, 2014, 35 (09)
  • [39] Pulsed Gate Dielectric Breakdown in a 32 nm Technology under Different ESD Stress Configurations
    Yang, Yang
    Gauthier, Robert
    Di Sarro, James
    Li, Junjun
    Mitra, Souvick
    Chatty, Kiran
    Mishra, Rahul
    Ioannou, Dimitris E.
    ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS 2010, 2010,
  • [40] Investigation on the Behavior of Stacked Devices Within Output Drivers Under ESD Conditions
    Lee, Gi-Doo
    Chun, Jung-Hoon
    Cao, Shuqing
    Beebe, Stephen G.
    Kwon, Kee-Won
    Dutton, Robert W.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (12) : 3313 - 3320