APPLICATION FOR SIT FOR LOGIC LSI.

被引：0
|
作者：
Mochida, Yasunori [1 ]
Nonaka, Terumoto [1 ]
机构：
[1] Nippon Gakki Co, R&D Lab,, Hammatsu, Jpn, Nippon Gakki Co, R&D Lab, Hammatsu, Jpn
来源：
Japan Annual Reviews in Electronics, Computers & Telecommunications | 1982年 / 1卷
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
18
引用
收藏
页码：249 / 257
相关论文
共 50 条
  • [1] LAYOUT SYSTEM FOR THE RANDOM LOGIC PORTION OF MOS LSI.
    Shirakawa, Isao
    Okuda, Noboru
    Harada, Takashi
    Tani, Sadahiro
    Ozaki, Hiroshi
    Jahrbuch der Schiffbautechnischen Gesellschaft, 1980, : 92 - 99
  • [2] SEMICUSTOM LSI.
    Kuramitsu, Yoichi
    Ueda, Masahiro
    Mitsubishi Electric Advance, 1985, 33 : 4 - 5
  • [3] LAYOUT SYSTEM FOR RANDOM LOGIC PART OF MOS LSI.
    Harada, Takashi
    Tani, Sadahiro
    Okuda, Noboru
    Shirakawa, Isao
    Ozaki, Hiroshi
    Electronics & communications in Japan, 1980, 63 (06): : 18 - 28
  • [4] ATE FOR VLSI/LSI.
    Anon
    Evaluation Engineering, 1984, 23 (09): : 54 - 71
  • [5] X. 25 LSI.
    Ito, Kiichiro
    Japan Annual Reviews in Electronics, Computers & Telecommunications, 1985, 20 : 315 - 325
  • [6] Optimization of contact hole lithography for 65-nm node logic LSI.
    Setta, Yuji
    Futatsuya, Hiroki
    Sagisaka, Atsushi
    Chijimatsu, Tatsuo
    Minami, Takayoshi
    Sugimoto, Fumitoshi
    Ishikawa, Seiichi
    Asai, Satoru
    OPTICAL MICROLITHOGRAPHY XIX, PTS 1-3, 2006, 6154 : U2279 - U2286
  • [7] APPROACH TO POLYCELL PLACEMENT FOR LSI.
    Sha Lu
    Tang Pushan
    Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors, 1984, 5 (04): : 412 - 421
  • [8] PERFORMANCE OF HETEROSTRUCTURE FET'S IN LSI.
    Tiwari, Sandip
    IEEE Transactions on Electron Devices, 1986, ED-33 (05) : 554 - 563
  • [9] LAYOUT - PARTITIONING METHOD FOR MSI AND LSI.
    Brinkmann, K.D.
    Mlynski, D.A.
    Proceedings - IEEE International Symposium on Circuits and Systems, 1977, : 160 - 163
  • [10] HIGH PRESSURE OXIDATION OF SILICON AND ITS APPLICATION TO FABRICATION OF MOS LSI.
    Miyoshi, Hirokazu
    Hirayama, Makoto
    Tsubouchi, Natsuro
    Abe, Haruhiko
    Japan Annual Reviews in Electronics, Computers & Telecommunications, 1982, 1 : 82 - 99
12345