共 50 条
- [41] HIGH-PERFORMANCE BIT-SERIAL ADDERS AND MULTIPLIERS IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1992, 139 (01): : 109 - 113
- [43] A BIT-SERIAL VLSI RECEPTIVE-FIELD ACCUMULATOR PROCEEDINGS OF THE IEEE 1989 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1989, : 323 - 328
- [44] HDL Based Implementation of NxN Bit-Serial Multiplier 2014 INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND INTEGRATED NETWORKS (SPIN), 2014, : 470 - 474
- [46] A bit-serial systolic algorithm and VLSI implementation for RSA 1997 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING, VOLS 1 AND 2: PACRIM 10 YEARS - 1987-1997, 1997, : 523 - 526
- [47] SORTING WITHOUT EXCHANGES ON A BIT-SERIAL SYSTOLIC ARRAY IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1990, 137 (05): : 345 - 352
- [50] An area-efficient bit-serial integer multiplier VLSI'03: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON VLSI, 2003, : 131 - 137