Submicron BiCMOS compatible high voltage MOS transistors

被引：0
|
作者：
Li, Yong Q. [1 ]
Salama, C.A.T. [1 ]
机构：
[1] Univ of Toronto, Toronto, Canada
来源：
IEEE International Symposium on Power Semiconductor Devices & ICs | 1994年
关键词：
Electric breakdown - Electric resistance - Fabrication - Integrated circuit layout - Mathematical models - MOS devices - MOSFET devices - Optimization - Semiconductor device structures - Semiconductor doping - VLSI circuits;
D O I：
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中图分类号：
学科分类号：
摘要：
The design and implementation of high-voltage MOS transistors fully compatible with 0.8μm BiCMOS technology is considered in this paper. Two-dimensional simulations were used in the design of the structures. Three different structures are presented. The results indicate that it is possible to implement MOS devices with a pitch of 8μm, breakdown voltage of the order of 20 to 50V and specific on-resistance of the order of 0.8 to 10 mΩcm2 by minor layout modifications and without changes in the process itself.
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页码：355 / 358
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