Study of drain alloy for antimony substrate vertical high voltage power metal oxide semiconductor field effect transistors

被引：0

作者：

Liao, Chien-Nan ^{[1
]}

Chien, Feng-Tso ^{[2
]}

Chen, Chii-Wen ^{[3
]}

Tsai, Yao-Tsung ^{[1
]}

机构：

[1] Department of Electrical Engineering, National Central University, Jhongli 320, Taiwan

[2] Department of Electronic Engineering, Feng Chia University, Taichung 407, Taiwan

[3] Department of Electronic Engineering, Minghsin University of Science and Technology, Hsinchu 304, Taiwan

来源：

Japanese Journal of Applied Physics | 2008年 / 47卷 / 4 PART 1期

关键词：

An antimony (Sb)-doped substrate is used to fabricate high voltage power metal oxide semiconductor field effect transistor (MOSFET) to prevent out-doping phenomenon. Since the contact resistance of Sb-doped substrate is higher than that of the phosphorus (P) and arsenic (As)-doped substrates; which are widely used for low breakdown voltage power MOSFETs; devices that are fabricated with an Sb substrate have a higher source-drain forward voltage (VSD). The increased VSD is associated with power loss while the device is under switching in an inductive load bridge circuit. In this work; devices were baked at different temperatures for various times to reduce the VSD. The VSD was efficiently reduced at 300C after 6h baking. © 2008 The Japan Society of Applied Physics;

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摘要：

Journal article (JA)

引用

页码：2122 / 2123

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