共 50 条
- [31] Reconfigurable Design with Clock Gating 2008 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING AND SIMULATION, PROCEEDINGS, 2008, : 187 - 194
- [32] Automatic Register Transfer Level CAD Tool Design for Advanced Clock Gating and Low Power Schemes 2012 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2012, : 21 - 24
- [33] Integration of Clock Gating and Power Gating in Digital Circuits 2019 5TH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTING & COMMUNICATION SYSTEMS (ICACCS), 2019, : 704 - 707
- [34] Low Power Logic Obfuscation Through System Level Clock Gating 2023 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, ISLPED, 2023,
- [37] Performance Analysis and Implementation of Clock gating techniques for Low power applications 2014 INTERNATIONAL CONFERENCE ON SCIENCE ENGINEERING AND MANAGEMENT RESEARCH (ICSEMR), 2014,
- [39] SAT based Low Power Scheduling and Module Binding with Clock Gating 2015 THIRD INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATION, CONTROL AND INFORMATION TECHNOLOGY (C3IT), 2015,
- [40] A Low Power Hybrid Clock Gating Technique for High Frequency Applications 2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,