Design of reliable and fast Schmitt trigger 10T SRAM cells using in-memory computing

被引：0
|
作者：
Rani, Mucherla Usha [1 ]
Reddy Siva Sankara, N. [2 ]
Rajendra Naik, B. [3 ]
机构：
[1] Dept. of ECE, ACE Engineering College, Telangana, Ghatkesar,501301, India
[2] Dept. of ECE, Vasavi College of Engineering, Ibrahimbagh, Telangana, Hyderabad,500031, India
[3] Dept. of ECE, Osmania University, Telangana, Hyderabad,500007, India
来源：
Engineering Research Express | 2024年 / 6卷 / 04期
关键词：
42;
D O I：
10.1088/2631-8695/ad80fd
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [1] Low Power Ternary XNOR using 10T SRAM for In-Memory Computing
    Lee, Sanghyun
    Kim, Youngmin
    [J]. 2022 19TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2022, : 352 - 353
  • [2] Design and Analysis of Schmitt Trigger Based 10T SRAM in 32 nm Technology
    Rajput, Amit Singh
    Pattanaik, Manisha
    Tiwari, R. K.
    [J]. 2017 3RD IEEE INTERNATIONAL SYMPOSIUM ON NANOELECTRONIC AND INFORMATION SYSTEMS (INIS), 2017, : 234 - 237
  • [3] An Energy-Efficient and Robust 10T SRAM based In-Memory Computing Architecture
    Srivastava, Noopur
    Rajput, Anil Kumar
    Pattanaik, Manisha
    Kaushal, Gaurav
    [J]. 2023 36TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2023 22ND INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, VLSID, 2023, : 133 - 138
  • [4] An energy-efficient 10T SRAM in-memory computing macro for artificial intelligence edge processor
    Rajput, Anil Kumar
    Pattanaik, Manisha
    Kaushal, Gaurav
    [J]. Memories - Materials, Devices, Circuits and Systems, 2023, 5
  • [5] Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports
    Lin, Zhiting
    Zhu, Zhiyong
    Zhan, Honglan
    Peng, Chunyu
    Wu, Xiulong
    Yao, Yuan
    Niu, Jianchao
    Chen, Junning
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 56 (09) : 2832 - 2844
  • [6] A 10T SRAM with Two Read and Write Modes across Row and Column for CAM Operation and Computing In-Memory
    Zhang, Zhang
    Chen, Zhihao
    Chen, Sikai
    Xie, Guangjun
    Zeng, Jianmin
    Liu, Gang
    [J]. 2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024, 2024,
  • [7] Realizing In-Memory Computing using Reliable Differential 8T SRAM for Improved Latency
    Dahiya, Ayush
    Mittal, Poornima
    Rohilla, Rajesh
    [J]. ACM Transactions on Design Automation of Electronic Systems, 2024, 29 (06)
  • [8] A low power Schmitt-trigger driven 10T SRAM Cell for high speed applications
    Soni, Lokesh
    Pandey, Neeta
    [J]. INTEGRATION-THE VLSI JOURNAL, 2024, 97
  • [9] Design of In-Memory Computing Enabled SRAM Macro
    Monga, Kanika
    Behera, Sunit
    Chaturvedi, Nitin
    Gurunarayanan, S.
    [J]. 2022 IEEE 19TH INDIA COUNCIL INTERNATIONAL CONFERENCE, INDICON, 2022,
  • [10] 10T SRAM Design By Using Stack Transistor Technique
    Mapari, Sneha K.
    Sharma, Manish
    [J]. 2018 FOURTH INTERNATIONAL CONFERENCE ON COMPUTING COMMUNICATION CONTROL AND AUTOMATION (ICCUBEA), 2018,
12345