Design space exploration of neural network accelerator based on transfer learning

被引:0
|
作者
Wu Y. [1 ]
Zhi T. [2 ]
Song X. [2 ]
Li X. [1 ]
机构
[1] School of Computer Science, University of Science and Technology of China, Hefei
[2] State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing
基金
中国国家自然科学基金;
关键词
design space exploration (DSE); multi-task learning; neural network accelerator; transfer learning;
D O I
10.3772/j.issn.1006-6748.2023.04.009
中图分类号
学科分类号
摘要
With the increasing demand of computational power in artificial intelligence (AI) algorithms, dedicated accelerators have become a necessity. However, the complexity of hardware architectures, vast design search space, and complex tasks of accelerators have posed significant challenges. Traditional search methods can become prohibitively slow if the search space continues to be expanded. A design space exploration (DSE) method is proposed based on transfer learning, which reduces the time for repeated training and uses multi-task models for different tasks on the same processor. The proposed method accurately predicts the latency and energy consumption associated with neural network accelerator design parameters, enabling faster identification of optimal outcomes compared with traditional methods. And compared with other DSE methods by using multilayer perceptron (MLP), the required training time is shorter. Comparative experiments with other methods demonstrate that the proposed method improves the efficiency of DSE without compromising the accuracy of the results. © 2023 Inst. of Scientific and Technical Information of China. All rights reserved.
引用
收藏
页码:416 / 426
页数:10
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