An efficient reliability estimation method for gate-level circuit

被引：0
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作者：
机构：
[1] [1,Cai, Shuo
[2] Kuang, Ji-Shun
[3] Liu, Tie-Qiao
[4] Zhou, Ying-Bo
来源：
Cai, S. (csustcs4002@163.com) | 1600年 / Science Press卷 / 35期
关键词：
Circuit reliability - Gate models - Probabilistic transfer matrixes (PTM) - Soft error - VLSI;
D O I：
10.3724/SP.J.1146.2012.01169
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学科分类号：
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