DESIGN AND DEVELOP LOW-POWER MEMORY CONTROLLER FOR GAIN CELL–EMBEDDED DYNAMIC RANDOM-ACCESS MEMORY CELL USING INTELLIGENT CLOCK GATING

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Department of Electronics and Communication Engineering, University College of Engineering, Osmania University, Hyderabad [1 ]
500007, India
不详 [2 ]
500034, India
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Telecommun Radio Eng | / 8卷 / 83-94期
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22;
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10.1615/TelecomRadEng.2024049973
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