DESIGN AND DEVELOP LOW-POWER MEMORY CONTROLLER FOR GAIN CELL–EMBEDDED DYNAMIC RANDOM-ACCESS MEMORY CELL USING INTELLIGENT CLOCK GATING

被引：0
|
作者：
Department of Electronics and Communication Engineering, University College of Engineering, Osmania University, Hyderabad [1 ]
500007, India
不详 [2 ]
500034, India
机构：
来源：
Telecommun Radio Eng | / 8卷 / 83-94期
关键词：
22;
D O I：
10.1615/TelecomRadEng.2024049973
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [41] A Novel Low Power Dynamic Memory Architecture Using Single Supply 3T Gain Cell
    Mamatha, Gadham
    Nagarjuna, Malladhi
    Rajendar, S.
    [J]. 2017 7TH IEEE INTERNATIONAL ADVANCE COMPUTING CONFERENCE (IACC), 2017, : 440 - 443
  • [42] Design and statistical analysis of low power and high speed 10T static random access memory cell
    Prasad, Govind
    Kumari, Neha
    Mandi, Bipin Chandra
    Ali, Maifuz
    [J]. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2020, 48 (08) : 1319 - 1328
  • [43] LOW POWER AND AREA EFFICIENT STATIC RANDOM ACCESS MEMORY DESIGN USING SCHMITT TRIGGER
    Balachandran, A.
    [J]. 2013 INTERNATIONAL CONFERENCE ON INFORMATION COMMUNICATION AND EMBEDDED SYSTEMS (ICICES), 2013, : 1183 - 1187
  • [44] gMRAM: Gain-Cell Magnetoresistive Random Access Memory for High Density Embedded Storage and in-Situ Computing
    Kazemi, Mohammad
    Bocko, Mark F.
    [J]. 2017 IEEE 60TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2017, : 405 - 408
  • [45] Development of a low-power static random access memory with a spacer-on-stopper structure using Co salicide
    Kim, JY
    Kim, JY
    Jeon, H
    Kim, SJ
    Kim, YD
    Lee, CM
    Kim, NC
    [J]. JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 2003, 43 (05) : 802 - 806
  • [46] Design of Low Power Memory Architecture Using 4T Content Addressable Memory Cell
    Ramakrishna, Pasula
    Rajendar, S.
    Malladhi, Nagarjuna
    [J]. 2017 4TH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTING AND COMMUNICATION SYSTEMS (ICACCS), 2017,
  • [47] A new single-poly flash memory cell with low-voltage and low-power operations for embedded applications
    Chi, MH
    Bergemont, A
    [J]. 55TH ANNUAL DEVICE RESEARCH CONFERENCE, DIGEST - 1997, 1997, : 126 - 127
  • [48] Resistive switching characteristics of Si3N4-based resistive-switching random-access memory cell with tunnel barrier for high density integration and low-power applications
    Kim, Sungjun
    Jung, Sunghun
    Kim, Min-Hwi
    Cho, Seongjae
    Park, Byung-Gook
    [J]. APPLIED PHYSICS LETTERS, 2015, 106 (21)
  • [49] Low-Power and Controllable Memory Window in Pt/Pr0.7Ca0.3MnO3/Yttria-Stabilized Zirconia/W Resistive Random-Access Memory Devices
    Liu, Xinjun
    Biju, Kuyyadi P.
    Park, Jubong
    Park, Sangsu
    Shin, Jungho
    Kim, Insung
    Sadaf, Sharif Md.
    Hwang, Hyunsang
    [J]. JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, 2012, 12 (04) : 3252 - 3255
  • [50] Characteristics of cell latch and leakage current at standby state in 6-T low-power static random access memory (SRAM) device
    Seo, SH
    Yang, WS
    Kim, SG
    Kim, KT
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, 2003, 42 (2B): : L151 - L153
12345