A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection

被引：0
|
作者：
Chen, Poki [1 ]
Wijaya, Joshua Adiel [1 ]
Kajihara, Seiji [2 ]
Adiono, Trio [3 ]
Chen, Hsiang-Yu [1 ]
Wang, Ruei-Ting [1 ]
Miyake, Yousuke [2 ]
机构：
[1] National Taiwan University of Science and Technology, Department of Electronic and Computer Engineering, Taipei,10607, Taiwan
[2] Kyushu Institute of Technology, Fukuoka,804-0015, Japan
[3] Institut Teknologi Bandung, School of Electrical Engineering and Informatics, Bandung,40132, Indonesia
来源：
IEEE Access | 2022年 / 10卷
关键词：
All Open Access; Gold;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
39
引用
收藏
页码：126429 / 126439
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