A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection

被引：0
|
作者：
Chen, Poki [1 ]
Wijaya, Joshua Adiel [1 ]
Kajihara, Seiji [2 ]
Adiono, Trio [3 ]
Chen, Hsiang-Yu [1 ]
Wang, Ruei-Ting [1 ]
Miyake, Yousuke [2 ]
机构：
[1] National Taiwan University of Science and Technology, Department of Electronic and Computer Engineering, Taipei,10607, Taiwan
[2] Kyushu Institute of Technology, Fukuoka,804-0015, Japan
[3] Institut Teknologi Bandung, School of Electrical Engineering and Informatics, Bandung,40132, Indonesia
来源：
IEEE Access | 2022年 / 10卷
关键词：
716.1 Information Theory and Signal Processing - 721.2 Logic Elements - 723.2 Data Processing and Image Processing - 943.3 Special Purpose Instruments;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
39
引用
收藏
页码：126429 / 126439
相关论文
共 50 条
  • [41] A fine time-resolution (< 3 ps-rms) Time-to-Digital Converter for Highly Integrated Designs
    Perktold, Lukas
    Christiansen, Jorgen
    [J]. 2013 IEEE INTERNATIONAL INSTRUMENTATION AND MEASUREMENT TECHNOLOGY CONFERENCE (I2MTC), 2013, : 1092 - 1097
  • [42] A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications
    Swann, BK
    Blalock, BJ
    Clonts, LG
    Binkley, DM
    Rochelle, JM
    Breeding, E
    Baldwin, KM
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (11) : 1839 - 1852
  • [43] A 1ps-Resolution Integrator-Based Time-to-Digital Converter Using a SAR-ADC in 90nm CMOS
    Xu, Zule
    Miyahara, Masaya
    Matsuzawa, Akira
    [J]. 2013 IEEE 11TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2013,
  • [44] A Two-Step Time-to-Digital Converter With 5.6-ps Resolution and 1-4255-μs Measurement Range
    Zhu, Rongzhen
    Wang, Siqi
    Tang, Zhong
    Lu, Zhenghao
    Lin, Ling
    Wu, Hanming
    Yu, Xiaopeng
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2024, 71 (02) : 552 - 556
  • [45] Single-Chip Time-to-Digital Converter with 10 ps Resolution, 160 ns Dynamic Range, and 1% LSB DNL
    Markovic, Bojan
    Tamborini, Davide
    Villa, Federica
    Tosi, Alberto
    [J]. 2012 IEEE NUCLEAR SCIENCE SYMPOSIUM AND MEDICAL IMAGING CONFERENCE RECORD (NSS/MIC), 2012, : 1440 - 1444
  • [46] A compact Time-to-Digital Converter (TDC) Module with 10 ps resolution and less than 1.5% LSB DNL
    Markovic, B.
    Villa, F.
    Bellisai, S.
    Bronzi, D.
    Scarcella, C.
    Boso, G.
    Shehata, A. Bahgat
    Della Frera, A.
    Tosi, A.
    [J]. 2012 IEEE PHOTONICS CONFERENCE (IPC), 2012, : 26 - 27
  • [47] Dual channel time-to-digital converter module with 10 ps resolution and 320 ns full scale range
    Tamborini, D.
    Portaluppi, D.
    Villa, F.
    Zappa, F.
    [J]. ELECTRONICS LETTERS, 2015, 51 (13) : 994 - U24
  • [48] FPGA Vernier Digital-to-Time Converter With 1.58 ps Resolution and 59.3 Minutes Operation Range
    Chen, Poki
    Chen, Po-Yu
    Lai, Juan-Shan
    Chen, Yi-Jin
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (06) : 1134 - 1142
  • [49] 1.0 Ps Resolution Time-to-Digital Converter Based-On Cascaded Time-Difference-Amplifier Utilizing Differential Logic Delay Cells
    Mandai, Shingo
    Iizuka, Tetsuya
    Nakura, Toru
    Ikeda, Makoto
    Asada, Kunihiro
    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2011, E94C (06): : 1098 - 1104
  • [50] A 3.9 ps Time-Interval RMS Precision Time-to-Digital Converter Using a Dual-Sampling Method in an UltraScale FPGA
    Wang, Yonggang
    Liu, Chong
    [J]. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2016, 63 (05) : 2617 - 2621
12345