Single-Chip Time-to-Digital Converter with 10 ps Resolution, 160 ns Dynamic Range, and 1% LSB DNL

被引：0
|
作者：
Markovic, Bojan [1 ]
Tamborini, Davide [1 ]
Villa, Federica [1 ]
Tosi, Alberto [1 ]
机构：
[1] Politecn Milan, Dipartimento Elettron & Informaz, I-20133 Milan, Italy
来源：
2012 IEEE NUCLEAR SCIENCE SYMPOSIUM AND MEDICAL IMAGING CONFERENCE RECORD (NSS/MIC) | 2012年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We present a low-power Time-to-Digital Converter (TDC) chip, fabricated in a standard cost-effective 0.35 mu m CMOS technology, that provides 160 ns dynamic range, 10 ps resolution and Differential Non-Linearity better than 0.01 LSB rms. This chip is the core of a compact TDC module, provided with an USB 2.0 interface for user-friendly control and data-acquisition. The TDC chip consumes just 80 mW and enables the development of power-effective, ultra-compact TDC array chips for multi-channel timing boards. The TDC is suitable for a wide variety of applications such as: Time-of-Flight (TOF) Positron Emission Tomography (PET), picoseconds timings of nuclear events, Fluorescence Lifetime Imaging (FLIM), 3D ranging measurements, time-resolved spectroscopy, Diffuse Optical Tomography (DOT), Optical Time-Domain Reflectometry (OTDR), quantum optics, etc.
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页码：1440 / 1444
页数：5
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