FPGA implementation of Hopfield neural network with transcendental nonlinearity

被引:0
|
作者
Yang, Songtao [1 ]
Min, Fuhong [1 ]
Yang, Xilin [1 ]
Ying, Jiajie [2 ]
机构
[1] Nanjing Normal Univ, Sch Elect & Automat Engn, Nanjing 210023, Peoples R China
[2] Nanjing Normal Univ, Sch Comp & Elect Informat, Sch Artificial Intelligence, Nanjing 210023, Peoples R China
基金
中国国家自然科学基金;
关键词
FPGA; Hopfield neural network; Piecewise linear method; Transcendental; BRAIN;
D O I
10.1007/s11071-024-10052-9
中图分类号
TH [机械、仪表工业];
学科分类号
0802 ;
摘要
Efficient hardware implementation of brain-like computing is of great assistance to various applications, such as reproducing the dynamic behaviors of neuron models. In this paper, the piecewise linear (PWL) fitting method with the changing slope and constant of different line segments is presented to implement the evaluation of complex nonlinear functions in neurons through field programmable gate arrays (FPGA) platform. The two-memristor-based Hopfield neural network (HNN) model with trigonometric function and transcendental nonlinearity is realized on the Xilinx AX545 FPGA development board, in which the digital hardware structure of tanh(x)\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\text{tanh}(x)$$\end{document} and sin(x)\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\text{sin}(x)$$\end{document} function is designed with a single multiplier, adder, and block RAM in FPGA for consuming less resources. The timing design of the function module is optimized for saving resources, in which the same module is employed at different clock signals through a clock delay. Compared with other methods, the results of TM-HNN using the proposed method is in high agreement with the emulated model. Moreover, the digital hardware results of model are regenerated from the oscillator to verify the numerical simulations.
引用
收藏
页码:20537 / 20548
页数:12
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