Dataflow formalisation of real-time streaming applications on a Composable and Predictable Multi-Processor SOC

被引:9
|
作者
Nelson, Andrew [1 ]
Goossens, Kees [2 ]
Akesson, Benny [3 ]
机构
[1] Eindhoven Univ Technol, Embedded Syst, NL-5600 MB Eindhoven, Netherlands
[2] Eindhoven Univ Technol, Comp Sci, NL-5600 MB Eindhoven, Netherlands
[3] Czech Tech Univ, CISTER ISEP Res Unit, Prague, Czech Republic
关键词
Real time; Mixed time criticality; Multi-processor; GALS; Dataflow; Performance analysis; EXECUTION;
D O I
10.1016/j.sysarc.2015.04.001
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Embedded systems often contain multiple applications, some of which have real-time requirements and whose performance must be guaranteed. To efficiently execute applications, modem embedded systems contain Globally Asynchronous Locally Synchronous (GALS) processors, network on chip, DRAM and SRAM memories, and system software, e.g. microkernel and communication libraries. In this paper we describe a dataflow formalisation to independently model real-time applications executing on the CompSOC platform, including new models of the entire software stack. We compare the guaranteed application throughput as computed by our tool flow to the throughput measured on an FPGA implementation of the platform, for both synthetic and real H.263 applications. The dataflow formalisation is composable (i.e. independent for each real-time application), conservative, models the impact of GALS on performance, and correctly predicts trends, such as application speed-up when mapping an application to more processors. (C) 2015 Elsevier B.V. All rights reserved.
引用
收藏
页码:435 / 448
页数:14
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