A multi matrix-processor core architecture for real-time image processing SoC

被引:0
|
作者
Mizumoto, Katsuya [1 ]
Tanizaki, Tetsushi [1 ]
Kobayashi, Soichi [1 ]
Nakajima, Masarni [1 ]
Gyohten, Takayuki [1 ]
Yarnasaki, Hiroyuki [1 ]
Noda, Hideyuki [1 ]
Higashida, Motoki [1 ]
Okuno, Yoshihiro [1 ]
Arimoto, Kazutarni [1 ]
机构
[1] Renesas Technol Corp, Itami, Hyogo 6640005, Japan
关键词
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a real time image processing SoC(MX-SoC) with programmable multi matrix-processor(MX-Core) architecture. The MX-SoC has three NIX-Cores, Host-CPU, and I/O peripheral modules. An unit MX-Core is a massively parallel (1024) flexible SIMD processor based on the matrix architecture. The MX-SoC, which can perform the image processing of CCD camera, is implemented on 90nm Low Power CMOS process technology and can operate at 162MHz under the worst condition. A novel parallel pixel data processing algorism, and multi task execution suitable for multi MX-Core processing can achieve 30 Frame/see image processing. This performance is 30 times faster than general purpose CPU solution. The MX-SoC with multi MX-Core architecture can realize the software solution of real time image processing application field.
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页码:180 / 183
页数:4
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