共 50 条
- [21] An efficient test-data compaction for low power VLSI testing 2008 IEEE INTERNATIONAL CONFERENCE ON ELECTRO/INFORMATION TECHNOLOGY, 2008, : 237 - 241
- [24] Accelerating reconfiguration of degradable VLSI arrays IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS, 2006, 153 (04): : 383 - 389
- [27] GATE ARRAYS FOR VLSI DESIGN. IEEE transactions on components, hybrids, and manufacturing technology, 1981, CHMT-5 (01): : 133 - 137
- [29] RECONFIGURABLE ARCHITECTURES FOR VLSI PROCESSING ARRAYS AFIPS CONFERENCE PROCEEDINGS, 1983, 52 : 565 - &