Design and Evaluation of Novel Effective Montgomery Modular Multiplication Architecture

被引:1
|
作者
Moayedi, Maryam [1 ]
Rezai, Abdalhossein [2 ]
机构
[1] ACECR Inst Higher Educ, Isfahan Banch, Esfahan 84175443, Iran
[2] ACECR, IUT Branch, Esfahan, Iran
关键词
Security; modular multiplication architecture; FPGA; parallel computation; compact SD;
D O I
10.14257/ijsia.2016.10.10.24
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Secure communication is a challenging issue in modern industries and critical infrastructures. The core technology used for securing the communication is cryptography. Modular multiplication is an important operation in cryptosystems. This paper investigates a novel modular multiplication algorithm and architecture. In the proposed algorithm and architecture, the parallel architecture and compact SD technique are utilized to improve the performance of modular multiplication operation and cryptosystems. The proposed architecture is implemented on Xilinx Virtex 5 FPGA. The complexity analysis results and FPGA implementation results show that the proposed modular multiplication algorithm and architecture provide improvement on the total computation time and areaxtime complexity compared to other modified modular multiplication algorithms and architectures.
引用
收藏
页码:261 / 270
页数:10
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