ANALYSIS AND MODELING OF INITIAL DELAY TIME AND ITS IMPACT ON PROPAGATION DELAY OF CMOS LOGIC GATES

被引：1
|
作者：
YANG, YH [1 ]
WU, CY [1 ]
机构：
[1] NATL CHIAO TUNG UNIV, INST ELECTR, HSINCHU, TAIWAN
来源：
IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS | 1989年 / 136卷 / 05期
关键词：
D O I：
10.1049/ip-g-2.1989.0042
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：245 / 254
页数：10
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