Design of High-Speed Parallel Data Interface Based on ARM & FPGA

被引：4

作者：

Zhang, Daode ^{[1
]}

Pan, Yurong ^{[1
]}

Hu, Xinyu ^{[1
]}

机构：

[1] Hubei Univ Technol, Sch Mech Engn, Wuhan 430068, Hubei, Peoples R China

来源：

JOURNAL OF COMPUTERS | 2012年 / 7卷 / 03期

关键词：

ARM; FPGA; Parallel Data Interface; metastability;

D O I：

10.4304/jcp.7.3.804-809

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

This article described a complete design of parallel interface based on ARM & FPGA, using the on-chip DPRAM in FPGA to improve the metastability problem which was generated during data transmission between the asynchronous clock-domains; And it achieved the design of ARM & FPGA hardware interface module, data-sending module, data-receiving module and FPGA driver module, also gave the feasible method that using a flag to solve the dislocation of data-reading; Test results indicate that the system works steadily.

引用

页码：804 / 809

页数：6

共 50 条

[1] An FPGA-based interface for recording high-speed data stream
Sun, ZY
Dong, YG
Guo, WX
Xiong, JP
Ma, C
Jia, HB
Feng, GP
[J]. 2002 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS AND WEST SINO EXPOSITION PROCEEDINGS, VOLS 1-4, 2002, : 1466 - 1470
[2] Design of high-speed data acquisition system based on FPGA
Mu, L
Bo, M
[J]. ISTM/2003: 5TH INTERNATIONAL SYMPOSIUM ON TEST AND MEASUREMENT, VOLS 1-6, CONFERENCE PROCEEDINGS, 2003, : 467 - 469
[3] A Novel High-Speed Parallel Scheme for Data Sorting Algorithm Based on FPGA
Dong, Shengnan
Wang, Xiaotao
Wang, Xingbo
[J]. PROCEEDINGS OF THE 2009 2ND INTERNATIONAL CONGRESS ON IMAGE AND SIGNAL PROCESSING, VOLS 1-9, 2009, : 3508 - +
[4] Ethernet Interface of High Speed Data Acquisition System Based on ARM-FPGA
Yang, Guangyou
Li, Ming
Zhang, Daode
Xu, Wan
[J]. ADVANCED SCIENCE LETTERS, 2011, 4 (6-7) : 2538 - 2542
[5] Design and FPGA Implementation of High-speed Parallel FIR Filters
Hou, Baolin
Yao, Yuancheng
Qin, Mingwei
[J]. PROCEEDINGS OF THE 3RD INTERNATIONAL CONFERENCE ON MECHATRONICS, ROBOTICS AND AUTOMATION (ICMRA 2015), 2015, 15 : 975 - 979
[6] Design and Implementation of Data Acquisition System Based on FPGA and High-speed AD
Li, Zhi
Chen, Dahua
[J]. MECHATRONICS ENGINEERING, COMPUTING AND INFORMATION TECHNOLOGY, 2014, 556-562 : 1515 - 1519
[7] Design and implementation of an FPGA based high-speed data buffer for optical interconnects
Voss, Sven-Hendrik
Talmi, Maati
Saniter, Juergen
[J]. 2006 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, VOLS 1 AND 2, PROCEEDINGS, 2006, : 675 - +
[8] FPGA design of the high-speed data transmission based on S5933
Wu, JP
[J]. ISTM/2005: 6th International Symposium on Test and Measurement, Vols 1-9, Conference Proceedings, 2005, : 5481 - 5483
[9] Design for high-speed parallel interface of long cable transmission
Zhuang, XM
Ren, YF
[J]. ISTM/2005: 6th International Symposium on Test and Measurement, Vols 1-9, Conference Proceedings, 2005, : 6804 - 6807
[10] Design of embedded high-speed data sapmling system based on ARM and DSP
Liang Yongfeng
Fang Dawei
[J]. Proceedings of the First International Symposium on Test Automation & Instrumentation, Vols 1 - 3, 2006, : 401 - 404

← 1 2 3 4 5 →