EXPERIMENTAL REALIZATION OF A FULL ADDER BY SUBSTRATE FED THRESHOLD LOGIC STRUCTURE

被引：0

|

作者：

HAN, CH

KIM, CK

机构：

来源：

ELECTRONICS LETTERS | 1983年 / 19卷 / 16期

关键词：

D O I：

10.1049/el:19830418

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

收藏

页码：613 / 615

页数：3

相关论文

共 50 条

[1] FEASIBILITY OF SUBSTRATE FED THRESHOLD LOGIC
HAN, CH
KIM, CK
YOO, GH
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (02) : 160 - 164
[2] QUATERNARY THRESHOLD LOGIC FULL-ADDER CIRCUIT WITH COMPLEMENTARY INPUTS
WHEATON, LB
CURRENT, KW
INTERNATIONAL JOURNAL OF ELECTRONICS, 1984, 56 (04) : 539 - 545
[3] CURRENT-MODE CMOS LATCHED QUATERNARY THRESHOLD LOGIC FULL ADDER
CURRENT, KW
ELECTRONICS LETTERS, 1992, 28 (13) : 1273 - 1275
[4] CURRENT-MODE CMOS QUATERNARY THRESHOLD LOGIC FULL ADDER CIRCUIT
CURRENT, KW
INTERNATIONAL JOURNAL OF ELECTRONICS, 1993, 74 (04) : 587 - 591
[5] Transistor Realization of Reversible Full Adder
Rao, Sumin
PROCEEDINGS OF 2011 INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY AND INDUSTRIAL ENGINEERING, 2011, : 72 - 75
[6] REALIZATION OF A MULTIVALUED INTEGRATED INJECTION LOGIC (MI2L) FULL ADDER
FRIEDMAN, N
SALAMA, CAT
HOLMES, FE
THOMPSON, PM
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (05) : 532 - 534
[7] Experimental Realization of a Nanomagnet Full Adder Using Slanted-Edge Magnets
Varga, Edit
Niemier, Michael T.
Csaba, Gyorgy
Bernstein, Garyh.
Porod, Wolfgang
IEEE TRANSACTIONS ON MAGNETICS, 2013, 49 (07) : 4452 - 4455
[8] Performance of Full Adder with Skewed Logic
Uma, R.
Dhavachelvan, P.
2012 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING AND COMMUNICATIONS (ICACC), 2012, : 150 - 153
[9] FLUIDIC REALIZATION OF THRESHOLD LOGIC
ERICKSON, HM
BELL, NR
MECHANICAL ENGINEERING, 1969, 91 (03) : 65 - &
[10] REALIZATION OF THRESHOLD LOGIC CIRCUITS
DATTAGUPTA, R
BASU, DK
INTERNATIONAL JOURNAL OF ELECTRONICS, 1974, 37 (01) : 79 - 82

← 1 2 3 4 5 →