IC WITH MERGED BIPOLAR/CMOS PROCESSING INTEGRATES LOGIC WITH POWER OUTPUTS

被引:0
|
作者
TRAVIS, B
机构
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:87 / 88
页数:2
相关论文
共 50 条
  • [41] RT Design of On-Chip EMI Filters in CMOS Logic IC
    Hiura, Shigeru
    Kitahara, Takaya
    Oohashi, Yutaka
    2008 EUROPEAN MICROWAVE CONFERENCE, VOLS 1-3, 2008, : 163 - +
  • [42] TEACHING POWER ELECTRONICS CONVERTER EXPERIMENTS THAT INTEGRATES FUZZY LOGIC APPROACH
    Rubaai, Ahmed
    Ofoli, Abdul R.
    2011 ASEE ANNUAL CONFERENCE & EXPOSITION, 2011,
  • [43] ENHANCED CMOS FOR ANALOG DIGITAL POWER IC APPLICATIONS
    DOLNY, GM
    SCHADE, OH
    GOLDSMITH, B
    GOODMAN, LA
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1986, 33 (12) : 1985 - 1991
  • [44] Conservation of the optical properties of SRO after CMOS IC processing
    Aceves-Mijares, Mariano
    Gomez-Ramirez, Emmanuel
    Diaz-Mendez, A.
    Miguel Rocha, Jose
    Pedraza Chavez, Jorge
    Alarcon-Salazar, J.
    Roman-Lopez, S.
    Dominguez, Carlos
    Merlos, Angel
    Formatje, Xavier
    Morales-Sanchez, Alfredo
    CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, 2014, 17 : 587 - 594
  • [45] Low power CMOS technology in programmable logic
    Hamid, M
    ELECTRONIC ENGINEERING DESIGN, 2002, 74 (903): : 37 - 38
  • [46] Low power CMOS technology in programmable logic
    Hamid, Mamoon
    Electronic Engineering (London), 2002, 74 (903): : 37 - 38
  • [47] Broadband and High-Efficiency Power Amplifier that Integrates CMOS and IPD Technology
    Chiou, Hwann-Kaeo
    Chung, Hua-Yen
    Hsu, Yuan-Chia
    Chang, Da-Chiang
    Juang, Ying-Zong
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2013, 3 (09): : 1489 - 1497
  • [48] SPEED UP, POWER DOWN FOR BIPOLAR LOGIC
    GREER, WT
    BAILEY, B
    COMPUTER DESIGN, 1984, 23 (13): : 161 - &
  • [49] CMOS PROVIDES PORTABLE PROCESSING POWER
    MENDELSOHN, A
    ELECTRONIC PRODUCTS MAGAZINE, 1983, 25 (13): : 69 - 72
  • [50] GEOMETRY INDEPENDENT DEEP TRENCH ETCHING, REFILL, AND PLANARIZATION FOR ISOLATION OF MERGED BIPOLAR-CMOS DEVICES
    EIDEN, GC
    HUGHES, JA
    BOYER, PK
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1984, 131 (08) : C311 - C311