FAULT TOLERANCE IN VLSI CIRCUITS

被引:41
|
作者
KOREN, I
SINGH, AD
机构
[1] Dept. of Electrical and Computer Engineering, University of Massachusetts, Amherst
基金
美国国家科学基金会;
关键词
D O I
10.1109/2.56854
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
[No abstract available]
引用
收藏
页码:73 / 83
页数:11
相关论文
共 50 条
  • [3] Reducing Rollback Cost in VLSI Circuits to Improve Fault Tolerance
    Bonnoit, Thierry
    Zergainoh, Nacer-Eddine
    Nicolaidis, Michael
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 26 (08) : 1438 - 1451
  • [6] Low Cost Rollback to Improve Fault-Tolerance in VLSI Circuits
    Bonnoit, Thierry
    Zergainoh, Nacer-Eddine
    Nicolaidis, Michael
    Velazco, Raoul
    2017 IEEE 8TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS), 2017,
  • [7] Fault detection in VLSI circuits
    Shaer, B
    ICM'99: ELEVENTH INTERNATIONAL CONFERENCE ON MICROELECTRONICS - PROCEEDINGS, 1999, : 101 - 104
  • [8] FAULT TOLERANCE ACHIEVED IN VLSI
    EMMERSON, R
    MCGOWAN, MJ
    IEEE MICRO, 1984, 4 (06) : 34 - 43
  • [9] Delay fault models for VLSI circuits
    Pomeranz, I
    Reddy, SM
    INTEGRATION-THE VLSI JOURNAL, 1998, 26 (1-2) : 21 - 40
  • [10] FAULT SIMULATION IN CMOS VLSI CIRCUITS
    ZAGHLOUL, ME
    GOBOVIC, D
    IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1991, 138 (04): : 203 - 212