SHRINKAGE AND ANNIHILATION OF STACKING-FAULTS IN SILICON

被引：27

作者：

SUGITA, Y ^{[1
]}

SHIMIZU, H ^{[1
]}

YOSHINAKA, A ^{[1
]}

AOSHIMA, T ^{[1
]}

机构：

[1] HITACHI LTD,DIV SEMICONDUCTOR & INTEGRATED CIRCUITS,KODAIRO,TOKYO 187,JAPAN

来源：

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY | 1977年 / 14卷 / 01期

关键词：

D O I：

10.1116/1.569260

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

引用

页码：44 / 46

页数：3

共 50 条

[21] ELECTRONIC BEHAVIOR OF DECORATED STACKING-FAULTS IN SILICON
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[22] DEEP STATES ASSOCIATED WITH STACKING-FAULTS IN SILICON
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[23] OXIDATION OF SILICON WITHOUT FORMATION OF STACKING-FAULTS
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[24] MODEL FOR FORMATION OF STACKING-FAULTS IN SILICON WAFERS
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[29] GENERATION OF STACKING-FAULTS AND DISLOCATION LOOPS IN SILICON WAFERS
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[30] ANOMALOUS TEMPERATURE EFFECT OF OXIDATION STACKING-FAULTS IN SILICON
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