Versatile BIST: An Integrated Approach to On-line/Off-line BIST for Data-Dominated Architectures

被引:0
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作者
Nilanjan Mukherjee
Ramesh Karri
机构
[1] Lucent Bell Labs,
来源
关键词
on-line test; built-in self test; concurrency; data-path architectures; test function; pattern generator; response compactor; high-level synthesis;
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摘要
Built-in Self Test (BIST) is increasingly being used in production testing of VLSICs. In BIST, extra logic is implemented to generate test patterns and compact test responses on chip. However, this extra logic is used only during the test mode. Traditionally, BIST structures used for on-line testing have been different from the BIST structures used for off-line production testing. Replicated hardware, comparators and checkers are typical on-line BIST structures. This is because on-line BIST techniques are mostly based on space or time or information redundancy. On the other hand, typical off-line BIST structures include linear feedback shift register (LFSR) based pattern generators and multiple input signature register (MISR) based test response compactors.
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页码:189 / 200
页数:11
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