共 50 条
- [32] Test Node Selection for Fault Diagnosis in Analog Circuits using Faster RCNN Model Circuits, Systems, and Signal Processing, 2023, 42 : 3229 - 3254
- [33] Test point selection based on binary grey wolf optimization algorithm for analog circuit PROCEEDINGS OF 2018 IEEE 3RD ADVANCED INFORMATION TECHNOLOGY, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IAEAC 2018), 2018, : 2253 - 2256
- [34] Research on test points selection using complex field fault modeling in analog circuit ADVANCES IN COMPUTATIONAL MODELING AND SIMULATION, PTS 1 AND 2, 2014, 444-445 : 1158 - 1162
- [35] Improved Node Matrix Optimization Method of Test Points at Circuit Board PROCEEDINGS OF THE 2014 INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND ELECTRONIC TECHNOLOGY, 2015, 6 : 494 - 497
- [36] A Test Point Selection Method Based on Circuit Topology Graph PROCEEDINGS OF THE 2015 INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND INTELLIGENT COMMUNICATION, 2015, 16 : 394 - 397
- [37] New method of temperature compensation on photoelectric analog isolating circuit Yibiao Jishu Yu Chuanganqi/Instrument Technique and Sensor, 1997, (08): : 37 - 40
- [38] A NEW GENERALISED HYBRID METHOD FOR NONLINEAR ANALOG CIRCUIT ANALYSIS REVUE ROUMAINE DES SCIENCES TECHNIQUES-SERIE ELECTROTECHNIQUE ET ENERGETIQUE, 2008, 53 (04): : 393 - 401
- [39] On Optimal CDN Node Selection 2014 15TH INTERNATIONAL CONFERENCE OF YOUNG SPECIALISTS ON MICRO/NANOTECHNOLOGIES AND ELECTRON DEVICES (EDM), 2014, : 136 - 138
- [40] Analytical Synthesis Method - A New Mathematical Design Method for the Analog Circuit Design NEW ASPECTS OF SYSTEMS THEORY AND SCIENTIFIC COMPUTATION, 2010, : 13 - +