共 50 条
- [1] A New Test Point Selection Method for Analog Circuit Journal of Electronic Testing, 2015, 31 : 53 - 66
- [2] A New Test Point Selection Method for Analog Circuit JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2015, 31 (01): : 53 - 66
- [5] Test point selection for analog integrated circuit Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology, 2004, 26 (04): : 645 - 650
- [6] Circuit topology selection based on neural networks APCCAS '98 - IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: MICROELECTRONICS AND INTEGRATING SYSTEMS, 1998, : 387 - 390
- [7] Graph-Grammar-Based Analog Circuit Topology Synthesis 2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2019,
- [8] Test point selection based on binary grey wolf optimization algorithm for analog circuit PROCEEDINGS OF 2018 IEEE 3RD ADVANCED INFORMATION TECHNOLOGY, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IAEAC 2018), 2018, : 2253 - 2256
- [9] Bionic topology optimization method based on graph method Hangkong Dongli Xuebao/Journal of Aerospace Power, 2021, 36 (11): : 2389 - 2399