Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding

被引：1

作者：

Gavrilov S.V. ^{[1
]}

Gurov S.I. ^{[2
,3
]}

Zhukova T.D. ^{[1
]}

Rukhlov V.S. ^{[2
,3
]}

Ryzhova D.I. ^{[1
]}

Tel’pukhov D.V. ^{[2
,3
]}

机构：

[1] Institute for Design Problems in Microelectronics of Russian Academy of Sciences, Moscow

[2] Faculty of Computational Mathematics and Cybernetics, Moscow State University, Moscow

[3] Faculty of Computational Mathematics and Cybernetics, Moscow State University, Moscow

来源：

Computational Mathematics and Modeling | 2017年 / 28卷 / 3期

关键词：

coding of information; combinational circuits; fault tolerance;

D O I：

10.1007/s10598-017-9372-3

中图分类号：

学科分类号：

摘要：

Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances: radiation, supply voltage jumps, signal degradation over time, etc. Investigations show that the probability of an error due to these factors may vary between very wide limits: from less than 0.1% for large circuits and up to 30% for very small circuits. In this article, we consider various methods of enhancing the fault tolerance of combinational circuits and also assess the effect of a single fault and a stuck-at fault on circuit operation for the case of combinational circuits from the ISCAS’85 set. © 2017, Springer Science+Business Media, LLC.

引用

页码：400 / 406

页数：6

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