Theory and verification of operator design methodology

Non-recurring-engineering (NRE) and time-to-market play an increasingly important role in the field of IC design. Meanwhile, with the continuous development of IC manufacturing technology, it is necessary to propose a novel design methodology to shorten design cycle and enhance design efficiency. In this paper, operator design methodology (ODM) is presented and an H.264 encoder is implemented as a verification. According to the flow of ODM, the register transfer level (RTL) design of H.264 encoder has been accomplished with 15 manmonths, which is lower than the average 19 man-months in the field of traditional application specific integrated circuit (ASIC) design. Moreover, with the advantage of operator design library, the design has a comparable performance with other ASIC implementations. The obtained design can support a real-time video encoding of 720p at 60 frames per second or 1080p at 30 frames per second, working at 167 MHz with SMIC 0.13 μm CMOS technology. These results provide good evidence for the practicability and efficiency of ODM.