A very high performance self-biased cascode current mirror for CMOS technology

被引:0
|
作者
Maneesha Gupta
Bhawna Aggarwal
Anil Kumar Gupta
机构
[1] MAIT,
[2] NSIT,undefined
[3] NIT,undefined
[4] Kurukshetra,undefined
关键词
Low voltage; CMOS analog integrated circuits; Cascode current mirror; High swing operation; Self-biased current mirror; Super-cascode technique; Active implementation;
D O I
暂无
中图分类号
学科分类号
摘要
This paper presents a novel high performance self-biased cascode current mirror (CM) for CMOS technology. The proposed circuit shows a resistance compensated high bandwidth CM operating at low voltages. This circuit uses super cascode configuration to obtain high output impedance required for high performance of CM. Active implementation of passive resistances of the proposed circuit is shown. The simulations of proposed CM are carried out by Mentor Graphics Eldospice based on TSMC 0.18 μm CMOS technology, for input current range of 0–500 μA. A bandwidth of 2.26 GHz, input and output resistances of 679 Ω and 482 MΩ respectively, are obtained with a single supply voltage of −1 V.
引用
收藏
页码:67 / 74
页数:7
相关论文
共 50 条
  • [21] Low-voltage high performance compact all cascode CMOS current mirror
    Garimella, A
    Garimella, L
    Ramirez-Angulo, J
    López-Martín, AJ
    Carvajal, RG
    [J]. ELECTRONICS LETTERS, 2005, 41 (25) : 1359 - 1360
  • [22] Wideband self-biased CMOS CCII
    Arslan, Emre
    Morgul, Avni
    [J]. PRIME: 2008 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PROCEEDINGS, 2008, : 217 - 220
  • [23] Self-biased saturable absorber mirror demonstrating very low saturation fluence
    Gadjiev, I. M.
    Ryvkin, B. S.
    Avrutin, E. A.
    Mikhrin, S. S.
    Livshits, D. A.
    Kovsh, A. R.
    [J]. ELECTRONICS LETTERS, 2010, 46 (01) : 74 - U105
  • [24] An improved CMOS bandgap reference with self-biased cascoded current mirrors
    Wu, Wen
    Wen Zhiping
    Zhang Yongxue
    [J]. EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS, 2007, : 945 - 948
  • [25] A high speed self-biased CMOS amplifier IP core
    Zhu, ZM
    Liu, LX
    Yang, YT
    [J]. PROCEEDINGS OF 2005 IEEE INTERNATIONAL WORKSHOP ON VLSI DESIGN AND VIDEO TECHNOLOGY, 2005, : 6 - 9
  • [26] A CMOS symmetric self-biased voltage reference
    Park, Minseon
    Park, Sung Min
    [J]. MICROELECTRONICS JOURNAL, 2018, 80 : 28 - 33
  • [27] Self-Biased 0.13-μm CMOS 2.4-GHz Class E Cascode Power Amplifier
    Fouad, Hafez
    Zekry, Abdel-halim
    Fawzy, Khalid
    [J]. NRSC: 2009 NATIONAL RADIO SCIENCE CONFERENCE: NRSC 2009, VOLS 1 AND 2, 2009, : 770 - 781
  • [28] High accuracy self-biasing cascode current mirror
    Sanchez-Gonzalez, Laura
    Ducourdray-Acevedo, Gladys
    [J]. IEEE MWSCAS'06: PROCEEDINGS OF THE 2006 49TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS,, 2006, : 465 - 468
  • [29] CMOS Body-Enhanced Cascode Current Mirror
    Gianni, C.
    Scotti, G.
    Trifiletti, A.
    Pennisi, S.
    [J]. ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 1593 - +
  • [30] Design of Cascode Current Mirror OTA in Ultra-Deep Submicron CMOS Technology
    Manolov, Emil Dimitrov
    [J]. 2017 XXVI INTERNATIONAL SCIENTIFIC CONFERENCE ELECTRONICS (ET), 2017,